1. Technical Field
The present invention relates to semiconductor wafer processing. More particularly, the present invention relates to securing semiconductor wafers against movement during wafer processing.
2. Description of the Prior Art
It is often beneficial to secure a semiconductor wafer against movement during the various wafer processing steps that must be performed when fabricating integrated circuits. In this way precision tolerances may be more readily maintained, allowing the fabrication of devices having very fine features, while assuring reproducibility and improving wafer yields. An example of a wafer processing step during which the wafer must be secured against movement is set forth in U.S. Pat. No. 5,108,569, in which a clamping mechanism is used to secure a wafer to a platform during the formation of a stoichiometric layer of a metal compound on a wafer surface.
In a physical vapor deposition ("PVD") system, such as is useful for depositing a metal film on a semiconductor wafer surface, a metal clamping ring 10 (see FIG. 1) is commonly used to secure the semiconductor wafer 12 during wafer processing. One problem often encountered with the use of metal clamping rings involves the plasma generated during PVD metal film deposition, which generates intense heat that causes the metal clamping ring to expand. Such expansion results in an increased clamping ring diameter which may exceed that of the wafer, such that the wafer can become attached or stuck inside the clamping ring, causing the wafer to break when the clamping ring again contracts.
Providing a clamping ring with a smaller inner diameter to account for ring expansion when the ring is heated reduces the usefulness of the clamping ring when less than full thermal cycling is achieved, or when wafer processing is performed in noncontinuous mode operation, i.e. when the clamping ring in repeatedly heated and cooled and, therefore, allowed to repeatedly expand and contract. A clamping ring having a smaller inner diameter covers a greater amount of the wafer surface for any processing steps that are performed while the clamping ring is maintained at lower temperatures, e.g. where the ring has not expanded to its largest inner diameter. This additional surface coverage significantly reduces effective wafer surface available for processing and, accordingly, reduces wafer yields.
During standard PVD processing, deposition of a metal film on the surface of a semiconductor wafer produces a metal film build-up 14 on the surface of the clamping ring 10. Over time, this build-up extends the height and inner diameter of the clamp ring and thus affects the profile of the clamping ring. For example, the build-up of metal film on the clamping ring shadows an intended metal film deposition on the surface of the wafer near the edge of the wafer.
In reference to the wafer centerline 18 in FIG. 1, the effective useful wafer diameter 16 is significantly decreased by such shadowing, which reduces the amount of wafer surface available for integrated circuit fabrication. Thus, the amount of wafer surface area available for device fabrication is decreased by both the metal film build-up on the clamping ring surface and the need to reduce the clamping ring inner diameter to compensate for expansion and contraction of the clamping ring due to thermal cycling.
The shadow cast upon the wafer surface near the wafer edge by the build-up affects the uniformity of metal film deposition on the wafer surface. The phenomenon is best understood with reference to FIG. 2, which is a graph plotting the thickness of a deposited aluminum film on a semiconductor wafer surface vs. distance along the wafer surface from a wafer edge; and FIG. 3, which is a graph plotting uniformity of a deposited aluminum film on a semiconductor wafer surface vs. distance along the wafer surface from a wafer edge
In FIG. 2, the thickness of a deposited aluminum film (expressed as .ANG.*1000) is shown having a rapid drop-off as the edge of the subject semiconductor wafer is approached. As a clamping ring acquires an increasingly thick metal film build-up with use, the point along the wafer surface from the edge at which this drop-off occurs extends increasingly away from the wafer edge and toward the center of the wafer. Because a significant percentage of the wafer surface area is lost when even a small portion of the wafer surface at the wafer periphery is unusable, any movement of the edge drop-off toward the center of the wafer can have disastrous effects on wafer yield and, as a result, per device cost of manufacture.
FIG. 3 shows the shadowing effect produced by a clamping ring after 2340 microns of aluminum film have been deposited on the clamping ring surface. It can be seen in the Figure. that as the edge of a 200 mm wafer is approached (i.e. at a larger measuring diameter), sheet resistance uniformity of aluminum alloy films deposited on the wafer surface exceeds 3.5% at 1 sigma (i.e. at one standard deviation), with a 49 point contour.
It is the current industry experience that a 1 sigma measurement (as is shown in FIG. 3) is not an acceptable standard for applications employing modern submicron technology. When applying modern standards (i.e. 3 sigma), the sheet resistance uniformity of aluminum alloys on 200 mm wafers exceeds 5%, with a 49 point contour, after just 1000-1500 microns of metal film build-up on a clamping ring.
When a clamping ring is new, the deposited metal film builds up gradually on the clamping ring surface, such that shadowing progresses gradually from the point at which the clamping ring contacts the wafer inwardly toward the point of nominal wafer thickness (at about 6 mm from the edge of the wafer). As the clamping ring ages, this inward transition is much steeper.
When the build-up on the clamping ring surface becomes thick enough to interfere with wafer yields, the clamping ring must be replaced. Currently, clamping rings are replaced when the build-up approaches 1000 microns. The clamping rings can be chemically cleaned; however, the selectivity of the chemical wet etch that is used to clean the clamping ring is limited and tends to reduce the clamping ring effectiveness over time. That is, known clamping rings may only be cleaned a limited number of times.
The cost of replacement clamping rings is not insignificant, about $4000-$5000 each. However, it is much more significant that a fabrication process must be shut down for 10-14 hours every 2-3 days to replace a worn clamping ring. This downtime has a profound effect on fab efficiency and throughput. Reducing such downtime would significantly increase fab efficiency and throughput and, as a result, profitability.
A further disadvantage of metallic clamping rings is their inherent thermal conductivity. Such clamping rings add heat to the wafer or act as a heat sink at the wafer edge, depending upon the relative temperature of the process environment in which the clamping ring is used. The thermal volatility of such known clamping rings can cause temperature non-uniformity across the wafer and result in reduced wafer yields and degraded device reliability.